PDF《LED Driver IC》

PT6965 LED Driver IC Tel: 886-66296288?Fax: 886-29174598? http://www.

princeton.com.tw?2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan DESCRIPTION PT6965 is an LED Controller driven on a 1/5 to 1/8 duty factor.

11 segment output lines,

4 grid output lines,

3 segment/grid output lines, one display memory, control circuit, key scan circuit are all incorporated into a single chip to build a highly reliable peripheral device for a single chip microcomputer. Serial data is fed to PT6965 via a four-line serial interface. Housed in a 30-pin SSOP and TSSOP, PT6965 pin assignments and application circuit are optimized for easy PCB Layout and cost saving advantages. APPLICATIONS ? Micro-computer peripheral device ? VCR set ? Combo set FEATURES ? CMOS technology ? Low power consumption ? Multiple display modes (14 segment,

4 Grid to

11 segment,

7 Grid) ? Key scanning (10 x

2 Matrix) ? 8-Step dimming circuitry ? Serial Interface for clock, data input, data output, strobe pins and low voltage operation ability when user'

s MCU power supply is 3.3 V ? Available in 30-pin, SSOP BLOCK DIAGRAM PT6965 V1.5

2 November

2012 APPLICATION CIRCUIT Notes: 1. The capacitor (0.1 ?F) connected between the GND and the VDD pins must be located as close as possible to the PT6965 chip. 2. The PT6965 power supply is separate from the application system power supply. 3.

10 K? R R R

1 K? COMMON CATHODE TYPE LED PANEL PT6965 V1.5

3 November

2012 ORDER INFORMATION Valid Part Number Package Type Top Code PT6965-X 30-pin, SSOP, 209mil PT6965-X PIN CONFIGURATION PIN DESCRIPTION Pin Name I/O Description Pin No. OSC I Oscillator Input Pin A resistor is connected to this pin to determine the oscillation frequency

1 DOUT O Data Output Pin (N-Channel, Open-Drain) This pin outputs serial data at the falling edge of the shift clock.

2 DIN I Data Input Pin This pin inputs serial data at the rising edge of the shift clock (starting from the lower bit)

3 CLK I Clock Input Pin This pin reads serial data at the rising edge and outputs data at the falling edge.

4 STB I Serial Interface Strobe Pin The data input after the STB has fallen is processed as a command. When this pin is HIGH , CLK is ignored.

5 K1, K2 I Key Data Input Pins The data sent to these pins are latched at the end of the display cycle. (Internal Pull-Low Resistor) 6,

7 VDD - Power Supply 8,

23 SG1/KS1 ~ SG10/KS10 O Segment Output Pins (p-channel, open drain) Also acts as the Key Source

9 ~

18 SG11 O Segment Output pins (P-Channel, open drain)

19 SG12/GR7 ~ SG14/GR5 O Segment / Grid Output Pins

20 ~

22 GND - Ground Pin 24, 27,

30 GR4 ~ GR1 O Grid Output Pins 25, 26, 28,

29 1

3 2

5 4

8 7

6 10

9 12

11 PT6965

26 24

25 22

23 19

20 21

17 18

16 30

28 29

27 14

13 15 OSC DOUT DIN CLK STB K1 K2 VDD SG1/KS1 SG2/KS2 SG3/KS3 SG4/KS4 SG5/KS5 SG6/KS6 SG7/KS7 GND GR1 GR2 GND GR3 GR4 GND VDD SG14/GR5 SG13/GR6 SG12/GR7 SG11 SG10/KS10 SG9/KS9 SG8/KS8 PT6965 V1.5

4 November

2012 INPUT/OUTPUT CONFIGURATIONS The schematic diagrams of the input and output circuits of the logic section are shown below. Input Pins: CLK, STB &

DIN Output Pins: K1 to K2 Output Pins: DOUT, GR1 to GR4 Output Pins: SG1 to SG11 Output Pins: SG14/GR5, SG13/GR6 and SG12/GR7 PT6965 V1.5

5 November

2012 FUNCTION DESCRIPTION COMMANDS A command is the first byte (b0 to b7) inputted to PT6965 via the DIN Pin after STB Pin has changed from HIGH to LOW State. If for some reason the STB Pin is set to HIGH while data or commands are being transmitted, the serial communication is initialized, and the data/commands being transmitted are considered invalid. COMMANDS 1: DISPLAY MODE SETTING COMMANDS PT6965 provides