PDF《USB 3.0 xHCI HOST CONTROLLER》

48 4-63 PCI Register 82h

49 4-64 Link Status Register Description

49 4-65 PCI Register 94h

50 4-66 Device Capabilities

2 Register Description

50 4-67 PCI Register 98h

50 4-68 Device Control

2 Register Description.50 4-69 PCI Register A0h.50 4-70 Link Control

2 Register Description.51 4-71 PCI Register A2h.51 4-72 Link Status

2 Register Description

51 4-73 PCI Register B0h.51 4-74 PCI Register B1h.52 4-75 PCI Register B2h.52 4-76 Serial Bus Slave Address Register Description

52 4-77 PCI Register B3h.53 4-78 Serial Bus Control and Status Register Description

53 4-79 PCI Register B4h.53 4-80 GPIO Control Register Description

54 4-81 PCI Register B6h.54 4-82 GPIO Data Register Description

54 4-83 PCI Register C0h.55 4-84 PCI Register C1h.55 4-85 PCI Register C2h.55 4-86 MSI-X Message Control Register Description.55 4-87 PCI Register C4h.56

8 List of Tables Copyright ? 2011C2013, Texas Instruments Incorporated TUSB7320, TUSB7340 www.ti.com SLLSE76L CMARCH 2011CREVISED MAY

2013 4-88 MSI-X Table Offset and BIR Register Description

56 4-89 PCI Register C8h.56 4-90 MSI-X PBA Offset and BIR Register Descriptions

56 4-91 PCI Register D0h.57 4-92 Subsystem Access Register Description.57 4-93 PCI Register D4h.57 4-94 General Control

0 Register Descrip........