PDF《74AHC245; 74AHCT245》

1.

General description The 74AHC245;

74AHCT245 is a high-speed Si-gate CMOS device. The 74AHC245;

74AHCT245 is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The 74AHC245;

74AHCT245 features an output enable input (OE), for easy cascading, and a send and receive direction control input (DIR). OE controls the outputs so that the buses are effectively isolated. 2. Features I Balanced propagation delays I All inputs have Schmitt-trigger actions I Inputs accept voltages higher than VCC I Input levels: N For 74AHC245: CMOS level N For 74AHCT245: TTL level I ESD protection: N HBM EIA/JESD22-A114E exceeds

2000 V N MM EIA/JESD22-A115-A exceeds

200 V N CDM EIA/JESD22-C101C exceeds

1000 V I Multiple package options I Speci?ed from ?40 °C to +85 °C and from ?40 °C to +125 °C 3. Ordering information 74AHC245;

74AHCT245 Octal bus transceiver;

3-state Rev.

05 ―

28 April

2009 Product data sheet Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC245D ?40 °C to +125 °C SO20 plastic small outline package;

20 leads;

body width 7.5 mm SOT163-1 74AHCT245D 74AHC245PW ?40 °C to +125 °C TSSOP20 plastic thin shrink small outline package;

20 leads;

body width 4.4 mm SOT360-1 74AHCT245PW 74AHC245BQ ?40 °C to +125 °C DHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad ?at package;

no leads;

20 terminals;

body 2.5 * 4.5 * 0.85 mm SOT764-1 74AHCT245BQ 74AHC_AHCT245_5 ? NXP B.V. 2009. All rights reserved. Product data sheet Rev.

05 ―

28 April

2009 2 of

16 NXP Semiconductors 74AHC245;

74AHCT245 Octal bus transceiver;

3-state 4. Functional diagram Fig 1. Logic symbol Fig 2. IEC logic symbol

2 1 DIR

18 19 B0 B1 B2 B3 B4 B5 B6 B7

3 17

4 16

5 15

6 14

7 13

8 12

9 A0 A1 A2 A3 A4 A5 A6 A7

11 OE mna174

17 3

1 19

2 1

16 4

15 5

14 6

13 7

12 8

11 9

18 G3 3EN1 3EN2

2 mna175 74AHC_AHCT245_5 ? NXP B.V. 2009. All rights reserved. Product data sheet Rev.

05 ―

28 April

2009 3 of

16 NXP Semiconductors 74AHC245;

74AHCT245 Octal bus transceiver;

3-state 5. Pinning information 5.1 Pinning 5.2 Pin description (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 3. Pin con?guration SO20, TSSOP20 Fig 4. Pin con?guration DHVQFN20 74AHC245 74AHCT245 DIR VCC A0 OE A1 B0 A2 B1 A3 B2 A4 B3 A5 B4 A6 B5 A7 B6 GND B7 001aak037

1 2

3 4

5 6

7 8

9 10

12 11

14 13

16 15

18 17

20 19 001aak038 74AHC245 74AHCT245 Transparent top view B6 A6 A7 B5 A5 B4 A4 B3 A3 B2 A2 B1 A1 B0 A0 OE GND B7 DIR V CC

9 12

8 13

7 14

6 15

5 16

4 17

3 18

2 19

10 11

1 20 terminal

1 index area GND(1) Table 2. Pin description Symbol Pin Description DIR

1 direction control input A0

2 data input/output A1

3 data input/output A2

4 data input/output A3

5 data input/output A4

6 data input/output A5

7 data input/output A6

8 data input/output A7

9 data input/output GND

10 ground (0 V) B7

11 data input/output B6

12 data input/output B5

13 data input/output B4

14 data input/output B3

15 data input/output B2

16 data input/output 74AHC_AHCT245_5 ? NXP B.V. 2009. All rights reserved. Product data sheet Rev.

05 ―

28 April

2009 4 of

16 NXP Semiconductors 74AHC245;

74AHCT245 Octal bus transceiver;

3-state 6. Functional description [1] H = HIGH voltage level;