编辑: LinDa_学友 2019-07-11

3 : Contrast Definition ote

4 : Visual Angle Direction Priority

12 :

00 3 :

00 6 :

00 9 :

00 Selected Wave Non-Selected Wave Selected Wave Non-Selected Wave Brightness Brightness Vop Vop Voltage Voltage Contrast Ratio : Cr=A/B A A B B Cr Cr I I IL L LL L LU U UM M MI I I A A A T T T I3002-7IX 2440A 11/20 6. Interface o Pin ame Function

1 NC Not Connect

2 NC Not Connect

3 NC Not Connect

4 NC Not Connect

5 GND Power Ground

6 VCC Power Input (+2.8V)

7 VCC Power Input (+2.8V)

8 FMARK FMARK Signal Pin

9 CS Chip Select Input Pin

10 RS Register Select Input Pin

11 WR Chip Select Input Pin

12 RD Read Data Select Input Pin

13 DB0 IM1/IM0 : 1/1

8 bit I/F : DB17~10 IM1/IM0 : 0/1

9 bit I/F : DB17~9 IM1/IM0 : 1/0

16 bit I/F : DB17~10 and DB8~1 IM1/IM0 : 0/0

18 bit I/F : DB17~0 Note : Unused pins must be fixed GND level

14 DB1

15 DB2

16 DB3

17 DB4

18 DB5

19 DB6

20 DB7

21 DB8

22 DB9

23 DB10

24 DB11

25 DB12

26 DB13

27 DB14

28 DB15

29 DB16

30 DB17

31 IM1 MPU-Interface Mode Select

32 IM0

33 NC Not Connect

34 RESET Reset Select Input Pin

35 GND Power Ground

36 A B/L Power Input Pin Anode

37 K1 B/L Power Input Pin Negative

38 K2 B/L Power Input Pin Negative

39 K3 B/L Power Input Pin Negative

40 K4 B/L Power Input Pin Negative I I IL L LL L LU U UM M MI I I A A A T T T I3002-7IX 2440A 12/20 7. Timing Characteristic i80 18/16-bit System Bus Interface Timing (a) Write to Register nCS RS nRD nWR DB[17:0] (b) Read from Register nCS RS nRD nWR DB[17:0] i80 9/8-bit System Bus Interface Timing (a) Write to Register nCS RS nRD nWR DB[17:10] (b) Read from Register nCS RS nRD nWR DB[17:10] I I IL L LL L LU U UM M MI I I A A A T T T I3002-7IX 2440A 13/20 Item Symbol Unit Min. Typ. Max. Test Condition Bus cycle time Write tCYCW ns

100 - - - Read tCYCR ns

300 - - - Write low-level pulse width PWLW ns

50 -

500 - Write high-level pulse width PWHW ns

50 - - - Read low-level pulse width PWLR ns

150 - - - Read high-level pulse width PWHR ns

150 - - Write / Read rise / Fall time tWRr/tWRf ns - -

25 Setup time Write (RS to nCS, E/nWR) tAS ns

10 - - Read (RS to nCS, RW/nRD)

5 - - Address hold time tAH ns

5 - Write data set up time tDSW ns

10 - Write data hold time tH ns

15 - Read data delay time tDDR ns -

100 Read data hold time tDHR ns

5 - I I IL L LL L LU U UM M MI I I A A A T T T I3002-7IX 2440A 14/20 8. Backlight 8.1 Standard Lamp Styles (Edge Lighting Type): The LED chips are distributed over the edge light area of the illumination unit, which gives the less power consumption: 8.2 The Main Advantages of the LED Backlight are as Following: The brightness of the backlight can simply be adjusted. By a resistor or a potentiometer. 8.3 Data About LED Backlight: Item Symbol Conditions Min. Typ. Max. Unit Forward voltage Vf If =80 - 3.3 3.5 V Forward current If -

80 - mA Uniformity - If=80 80% - - - Luminous color - White Chip connection - 4-LED Parallels connection NOTE: 1.Backlight Only Average Luminous Intensity of P1-P9 2.Uniformity = Min(P1~P9)/Max(P1~P9) * 100%>

80% 8.4 Measured Method: P1 P2 P3 P4 P5 P6 P7 P8 P9 (Effective spatial Distribution) Hole Diameter±1? ;

1 to 9per Position Measured Luminous I I IL L LL L LU U UM M MI I I A A A T T T I3002-7IX 2440A 15/20 9. Reliability 9.1 MTTF The LCD module shall be designed to meet a minimum MTTF value of 50,000 hours with normal condition. (25°C in the room without sunlight;

not include lifetime of backlight and Touch Panel). 9.2 Tests o. Item Condition Criterion

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