PDF《TEA1755T》

13 March

2015 3 of

35 NXP Semiconductors TEA1755T HV start-up DCM/QR flyback controller with integrated DCM/QR PFC controller 3. Applications ? The device can be used in all applications requiring an efficient and cost-effective power supply solution for up to

250 W. Notebook adapters in particular benefit from the high level of integration 4. Ordering information 5. Block diagram Table 1. Ordering information Type number Package Name Description Version TEA1755T/1 SO16 plastic small outline package;

16 leads;

body width 3.9 mm SOT109-1 Fig 1. TEA1755T block diagram 7,0(5?V 7,0(5?V 3)&

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6 )/ VOVP(VOSENSE)), the PFC controller stops switching until the VVOSENSE <

VOVP(VOSENSE). If a mains UVP is detected, VVINSENSE <

Vstop(VINSENSE), the PFC controller stops switching until VVINSENSE >

Vstart(VINSENSE) again. When the VCC pin voltage drops under the UVLO level, both controllers stop switching and enter safe restart mode. In the safe restart mode, the VCC pin capacitor is recharged using the HV pin. At very low burst mode repetition rates, VCC can drop under the UVLO level. The UVLO protection feature Vprot(UVLO) prevents the decrease when the IC is in burst mode. TEA1755T All information provided in this document is subject to legal disclaimers. ? NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1.1 ―

13 March

2015 7 of

35 NXP Semiconductors TEA1755T HV start-up DCM/QR flyback controller with integrated DCM/QR PFC controller 7.1.2 Power-down mode The power-down mode can be activated for very low standby power applications by pulling the VVINSENSE <

Vth(pd) level. The TEA1755T stops switching and safe restart protection is activated. The high voltage start-up current source is also disabled during power-down and the TEA1755T does not restart until VVINSENSE is raised again. During Power-down mode, all internal circuitry is disabled except for a voltage detection circuit on the VINSENSE pin. This circuit is supplied by the HV pin and draws

12 ?A from the HV pin for biasing. Fig 4. Start-up sequence, normal operation and restart sequence 9&

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13 March

2015 8 of

35 NXP Semiconductors TEA1755T HV start-up DCM/QR flyback controller with integrated DCM/QR PFC controller 7.1.3 Supply management All internal reference voltages are derived from a temperature compensated and trimmed on-chip band gap circuit. Internal reference currents are derived from a temperature compensated and trimmed on-chip current reference circuit. 7.1.4 Latch input The LATCH pin is a general-purpose input pin which is used to switch off both converters. The pin sources a current IO(LATCH) of 30.5 ?A. Switching of both converters is stopped when VLATCH is <