PDF《INTEGRATED CIRCUITS》

DATA SHEET Product speci?cation Supersedes data of

2002 Dec

09 2004 Jan

26 INTEGRATED CIRCUITS SAA6752HS MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer

2004 Jan

26 2 Philips Semiconductors Product speci?cation MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer SAA6752HS CONTENTS

1 FEATURES 1.

1 Video input and preprocessing 1.2 Video compression 1.3 Audio input 1.4 Audio compression 1.5 Stream multiplexer 1.6 Output interface 1.7 Control domain 1.8 Other features

2 GENERAL DESCRIPTION 2.1 General 2.2 Application fields

3 QUICK REFERENCE DATA

4 ORDERING INFORMATION

5 BLOCK DIAGRAM

6 PINNING

7 FUNCTIONAL DESCRIPTION 7.1 System operation 7.2 Digital video input 7.3 Video compression 7.4 Digital audio input 7.5 Audio compression 7.6 SDRAM interface 7.7 Multiplexer 7.8 MPEG stream output port 7.9 Clock generation 7.10 Power control and reset 7.11 I2C-bus interface 7.12 Exception handling

8 BOUNDARY SCAN TEST 8.1 Initialization of boundary scan circuit 8.2 Device identification codes

9 I2C-BUS CONTROL AND STATUS REGISTERS

10 LIMITING VALUES

11 THERMAL CHARACTERISTICS

12 CHARACTERISTICS

13 PACKAGE OUTLINE

14 SOLDERING 14.1 Introduction to soldering surface mount packages 14.2 Reflow soldering 14.3 Wave soldering 14.4 Manual soldering 14.5 Suitability of surface mount IC packages for wave and reflow soldering methods

15 DATA SHEET STATUS

16 DEFINITIONS

17 DISCLAIMERS

18 PURCHASE OF PHILIPS I2C COMPONENTS

2004 Jan

26 3 Philips Semiconductors Product speci?cation MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer SAA6752HS

1 FEATURES 1.1 Video input and preprocessing ? Digital YUV input according to ITU-R BT.656 (8 bits at

27 MHz) and ITU-R BT.601 ? Support of enhanced ITU-R BT.656 input format containing decoded VBI data readable via I2C-bus;

Closed Caption (CC), Wide Screen Signalling (WSS) and copyright information with Copy Generation Management System (CGMS) ? Processing of non-broadcast video signals from analog VCR according to IEC

756 ? Two video clock input pins for switching two digital video sources ? ITU-R BT.601 format conversion to 1/2D1, 2/3D1 and Standard Interchange Format (SIF) ?

4 :

2 :

2 to

4 :

2 :

0 colour format conversion ? Decimation filtering for all format conversions ? Adaptive median filter and motion compensated filter for input noise reduction. 1.2 Video compression ? Real-time MPEG-2 encoding compliant to Main Profile at Main Level (MP@ML) for

625 and

525 interlaced line systems ? Supported resolutions: D1, 2/3D1, 1/2D1 and SIF ? IPB frame, IP frame and I frame only encoding supported at all modes ? Supported bit rates: up to

25 Mbit/s I-only encoding;

up to

15 Mbit/s IP-only or IBP encoding. ? Variable video bit rate mode for constant picture quality and constant bit rate mode to gain optimum picture quality from a fixed channel transfer rate ? Access to bit rate control parameters whilst encoding to support external real-time control algorithms (e.g. constrained variable bit rate control) ? Programmable Group Of Pictures (GOP) structure ? Innovative motion estimation with wide search range ? Adaptive quantization ? Motion compensated noise filter. 1.3 Audio input ? Audio inputs: I2S format or EIAJ format (16,

18 or

20 bits), master or slave mode at 32, 44.1 and

48 kHz ? Two digital I2S input ports for selection between two digital audio sources ? Audio clock generation: 256fs or 384fs (where fs =

48 kHz) locked to video frame rate (if video is present and locking is enabled) ? Sample rate conversion to