PDF《TLV8x3 具有低电平有效的开漏复位功能的 3 引脚电压监控器》

1 ? 已将页眉上显示的器件部件编号从标有字母的器件版本更改为显示单个 TLV803 器件

1 ? 已添加器件信息和 ESD 额定值表

1 ? 已添加详细 说明,应用和实施,电源相关建议,布局,器件和文档支持以及机械、封装和可订购信息部分

1 ? 已更改应用部分要点

1 ? 已从首页中删除引脚分配并将其移动至引脚配置和功能部分

1 ? Deleted Package/Ordering Information table;

for package and ordering information, see the package option addendum at the end of the data sheet.3 ? Changed all free-air to junction and all TA to TJ for all temperature ranges throughout data sheet

4 ? Changed free-air temperature to junction temperature in Absolute Maximum Ratings condition statement

4 ? Deleted Soldering temperature from Absolute Maximum Ratings table

4 ? Changed Thermal Information table;

updated thermal resistance values for all parameters

4 ? Changed free-air temperature to junction temperature in Electrical Characteristics condition statement

5 ? Changed temperature noted in Switching Characteristics condition statement

5 Changes from Revision A (June 2011) to Revision B Page ? 已将关于 TLV863 的新段落添加至说明部分

1 ? 已在首页中添加 TLV863 引脚分配.1 ? Added TLV863M to Package/Ordering Information.3 ? Added TLV863 to Thermal Information

4 ? Added TLV863M to Negative-Going Input Threshold Voltage parameter.5 ? Added TLV863M to Hysteresis parameter

5 ? Added TLV863 to Functional Block Diagram

7 3 TLV803, TLV853, TLV863 www.ti.com.cn ZHCS187C CAPRIL 2011CREVISED SEPTEMBER

2015 Copyright ? 2011C2015, Texas Instruments Incorporated

5 Device Comparison Table 1. Device Threshold Options DEVICE THRESHOLD VOLTAGE TLV803Z 2.25 V TLV803R 2.64 V TLV803S 2.93 V TLV803M 4.38 V TLV853M 4.38 V TLV863M 4.38 V Table 2. Device Family Comparison DEVICE FUNCTION TLV803 Open-Drain, RESET Output TLV809 Push-Pull, RESET Output TLV810 Push-Pull, RESET Output

6 Pin Configuration and Functions TLV803: DBZ Package 3-Pin SOT-23 Top View TLV853: DBZ Package 3-Pin SOT-23 Top View TLV863: DBZ Package 3-Pin SOT-23 Top View Pin Functions PIN I/O DESCRIPTION NAME TLV803 TLV853 TLV863 GND

1 2

3 ― Ground pin. RESET

2 1

1 O RESET is an open-drain output that is driven to a low impedance state when RESET is asserted. RESET remains low (asserted) for the delay time (td) after VDD exceeds VITC. Use a 10-k? to 1-M? pullup resistor on this pin. The pullup voltage is not limited by VDD. VDD

3 3

2 I Supply voltage pin. It is good analog design practice to place a 0.1-?F ceramic capacitor close to this pin.

4 TLV803, TLV853, TLV863 ZHCS187C CAPRIL 2011CREVISED SEPTEMBER

2015 www.ti.com.cn Copyright ? 2011C2015, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to GND. For reliable operation the device should not be operated at

7 V for more than t = 1000h continuously

7 Specifications 7.1 Absolute Maximum Ratings(1) over operating junction temperature range (unless otherwise noted) MIN MAX UNIT Voltage VDD(2)

0 7 V All other pins(2) C0.3 +7 Current Maximum low output current, IOL