PDF《F28M35x Concerto™ Microcontrollers》

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers.

PRODUCTION DATA. F28M35H52C, F28M35H22C, F28M35M52C, F28M35M22C, F28M35M20B, F28M35E20B SPRS742J CJUNE 2011CREVISED DECEMBER

2017 F28M35x Concerto? Microcontrollers

1 Device Overview

1 1.1 Features

1 ? Master Subsystem ― ARM? Cortex? -M3 C Up to

100 MHz C Embedded Memory C Up to 512KB of Flash (ECC) C Up to 32KB of RAM (ECC or Parity) C Up to 64KB of Shared RAM C 2KB of IPC Message RAM C Five Universal Asynchronous Receiver/Transmitters (UARTs) C Four Synchronous Serial Interfaces (SSIs) and a Serial Peripheral Interface (SPI) C Two Inter-integrated Circuits (I2Cs) C Universal Serial Bus On-the-Go (USB-OTG) + PHY C 10/100 ENET

1588 MII C Two Controller Area Network, D_CAN, Modules (Pin-Bootable) C 32-Channel Micro Direct Memory Access (?DMA) C Dual Security Zones (128-Bit Password per Zone) C External Peripheral Interface (EPI) C Micro Cyclic Redundancy Check (?CRC) Module C Four General-Purpose Timers C Two Watchdog Timer Modules C Endianness: Little Endian ? Clocking C On-chip Crystal Oscillator and External Clock Input C Dynamic Phase-Locked Loop (PLL) Ratio Changes Supported ? 1.2-V Digital, 1.8-V Analog, 3.3-V I/O Design ? Interprocessor Communications (IPC) C

32 Handshaking Channels C Four Channels Generate IPC Interrupts C Can be Used to Coordinate Transfer of Data Through IPC Message RAMs ? Up to

74 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins C Glitch-free I/Os ? Control Subsystem ― TMS320C28x 32-Bit CPU C Up to

150 MHz C C28x Core Hardware Built-in Self-Test C Embedded Memory C Up to 512KB of Flash (ECC) C Up to 36KB of RAM (ECC or Parity) C Up to 64KB of Shared RAM C 2KB of IPC Message RAM C IEEE-754 Single-Precision Floating-Point Unit (FPU) C Viterbi, Complex Math, CRC Unit (VCU) C Serial Communications Interface (SCI) C SPI C I2C C 6-Channel Direct Memory Access (DMA) C Nine Enhanced Pulse Width Modulator (ePWM) Modules C

18 Outputs (16 High-Resolution) C Six 32-Bit Enhanced Capture (eCAP) Modules C Three 32-Bit Enhanced Quadrature Encoder Pulse (eQEP) Modules C Multichannel Buffered Serial Port (McBSP) C EPI C One Security Zone (128-Bit Password) C Three 32-Bit Timers C Endianness: Little Endian ? Analog Subsystem C Dual 12-Bit Analog-to-Digital Converters (ADCs) C Up to 2.88 MSPS C Up to

20 Channels C Four Sample-and-Hold (S/H) Circuits C Up to Six Comparators With 10-Bit Digital-to- Analog Converter (DAC) ? Package C 144-Pin RFP PowerPAD? Thermally Enhanced Thin Quad Flatpack (HTQFP) ? Temperature Options: C T: C40?C to 105?C Junction C S: C40?C to 125?C Junction C Q: C40?C to 125?C Free-Air (AEC Q100 Qualification for Automotive Applications)

2 F28M35H52C, F28M35H22C, F28M35M52C, F28M35M22C, F28M35M20B, F28M35E20B SPRS742J CJUNE 2011CREVISED DECEMBER

2017 www.ti.com Submit Documentation Feedback Product Folder Links: F28M35H52C F28M35H22C F28M35M52C F28M35M22C F28M35M20B F28M35E20B Device Overview Copyright ? 2011C2017, Texas Instruments Incorporated 1.2 Applications ? Servo Drives ? High-End AC Inverters ? Industrial UPS ? Solar Inverters ? Electric Vehicle/Hybrid Electric Vehicle (EV/HEV) Chargers ? Power Line Communications 1.3 Description The Concerto family is a multicore system-on-chip microcontroller unit (MCU) with independent communication and real-time control subsystems. The F28M35x family of devices is the first series in the Concerto family. The communications subsystem is based on the industry-standard 32-bit ARM Cortex-M3 CPU and features a wide variety of communication peripherals, including Ethernet 1588, USB OTG with PHY, Controller Area Network (CAN), UART, SSI, I2C, and an external interface. The real-time control subsystem is based on TI'