PDF《AN10608》

AN10608 XTAL1 clock and IOW pulse synchronization issue Rev.

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2007 Application note Document information Info Content Keywords non-B, 16C UART, transmitter error Abstract Non-B 16C UARTs might occasionally send an extra character from the transmit FIFO. This application note discusses the root cause, impact to customer and offers a work-around solution. AN10608_1 ? NXP B.V. 2007. All rights reserved. Application note Rev.

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6 Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NXP Semiconductors AN10608 XTAL1 clock and IOW pulse synchronization issue Revision history Rev Date Description

01 20070423 application note;

initial version AN10608_1 ? NXP B.V. 2007. All rights reserved. Application note Rev.

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6 NXP Semiconductors AN10608 XTAL1 clock and IOW pulse synchronization issue 1. Introduction Occasionally, the non-B revision UART transmitter sends an extra incorrect character that consists of part of the previous transmitted character. All subsequent characters from the transmit FIFO will also be transmitted wrongly. 2. Explanation of root cause There is an internal signal that indicates the availability of a new character in the transmitter FIFO, and that signal is clocked by the processor IOW pulse. In the non-B UART design, that signal is not synchronized to the XTAL1 clock before it is being used in the transmitter state machine;

there exists a race condition between the XTAL1 clock and the IOW pulse. If the IOW pulse happens during the time the state machine's input flip-flops are being switched, then the state machine will get into the wrong state. The state machine should be in the start state, but it wrongly jumps to the transmit bit 4th state. The transmitter then wrongly sends out the last four bits of the old character without a start bit, and the rest of the characters in the transmit FIFO. 3. Impact to customer Once the transmitter gets into the condition described above, transmitted characters will be erroneously received by the receiver. 4. Work-around 1. Replace the non-B revision with the B revision devices. 2. The hardware work-around for this issue requires an external flip-flop to synchronize the IOW pulse to the XTAL1 clock. XTAL1 is used to clock the D flip-flop. The IOW signal from the processor is connected to the D input of the flip-flop, and the Q output of the D flip-flop is connected to the IOW input of the UART. See Figure

1 for the circuit hook-up example. We are not aware of any software work-around for this particular issue. Fig 1. Circuit hook-up 002aac939 CLK XTAL1 IOW D Q UART IOW XTAL1 AN10608_1 ? NXP B.V. 2007. All rights reserved. Application note Rev.

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6 NXP Semiconductors AN10608 XTAL1 clock and IOW pulse synchronization issue 5. Conclusion All 16C UART non-B versions are effected by this issue, and the issue has been fixed on the revision B. We advise that customers to switch from the non-B revision to revision B as soon as possible when the design allowed. Please see application notes AN10257 and AN10312 for the detailed explanation of the differences between the non-B and the B revisions. 6. Abbreviations Table 1. Abbreviations Acronym Description FIFO First In, First Out UART Universal Asynchronous Receiver/Transmitter AN10608_1 ? NXP B.V. 2007. All rights reserved. Application note Rev.

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6 NXP Semiconductors AN10608 XTAL1 clock and IOW pulse synchronization issue 7. Legal information 7.1 Definitions Draft ― The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 7.2 Disclaimers General ― Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes ― NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use ― NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications ― Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 7.3 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. NXP Semiconductors AN10608 XTAL1 clock and IOW pulse synchronization issue ? NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: