PDF《的±1°C 远程和本地温度传感器》

31 34 ms Local temperature sensor resolution

12 Bits Remote temperature sensor resolution

12 Bits Remote sensor source current, high Series resistance

1 k? max

120 μA Remote sensor source current, medium

45 μA Remote sensor source current, low 7.5 μA η Remote transistor ideality factor TMP451 optimized ideality factor 1.008 SMBus INTERFACE VIH High-level input voltage 1.4 V VIL Low-level input voltage 0.45 V Hysteresis

200 mV SMBus output low sink current

6 mA VOL Low-level output voltage IO =

6 mA 0.15 0.4 V Logic input current

0 V ≤ VI ≤ 3.6 V C1

1 μA SMBus input capacitance

3 pF SMBus clock frequency 0.01 2.5 MHz SMBus time-out

20 25

30 ms SCL falling edge to SDA valid time

1 μs DIGITAL OUTPUTS ( THERM, ALERT/THERM2 ) VOL Low-level output voltage IO =

6 mA 0.15 0.4 V IOH High-level output leakage current VO = V+

1 μA (1) Tested with less than 5-? effective series resistance and 100-pF differential input capacitance.

4 Copyright ? 2013C2014, Texas Instruments Incorporated TMP451 www.ti.com.cn ZHCSB68A CJUNE 2013CREVISED DECEMBER

2014 Electrical Characteristics (continued) At TA = C40°C to 125°C and V+ = 3.3 V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNIT POWER SUPPLY V(V+) Specified voltage range 1.7 3.6 V 0.0625 conversions per second

27 40 μA

16 conversions per second

165 250 μA

32 conversions per second

300 450 μA IQ Quiescent current Serial bus inactive, shutdown mode

3 8 μA Serial bus active, ?S =

400 kHz, shutdown mode

90 μA Serial bus active, ?S = 2.5 MHz, shutdown mode

350 μA POR Power-on reset threshold 1.2 1.55 V 6.6 Timing Requirements FAST MODE HIGH-SPEED MODE PARAMETER MIN TYP MAX MIN TYP MAX UNIT ?(SCL) SCL operating frequency 0.001 0.4 0.001 2.5 MHz t(BUF) Bus free time between STOP and START Condition

1300 260 ns Hold time after repeated START condition. After this t(HDSTA)

600 160 ns period, the first clock is generated. t(SUSTA) Repeated START condition setup time

600 160 ns t(SUSTO) STOP condition setup time

600 160 ns t(HDDAT) Data hold time

0 900

0 150 ns t(SUDAT) Data setup time

100 30 ns t(LOW) SCL clock LOW period

1300 260 ns t(HIGH) SCL clock HIGH period

600 60 ns ........